IEEE CS / TCVLSI August Newsletter

The IEEE VLSI Circuits and Systems Letter (VCaSL) is affiliated with the Technical Committee on VLSI (TCVLSI) under the IEEE Computer Society. It aims to report recent advances in VLSI technology, education, and opportunities and, consequently, grow the research and education activities in the area.

IEEE Computer Society Team
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TCVLSI Aug2021-newsletterWhere can AI take us in the EDA domain” by Dr Naveed Sherwani and Sai Charan Lanka, where they show that AI is already beginning to play a critical role in EDA and it will play an even more significant role in EDA in the coming decades. The newsletter spotlights one of TCVLSI’s sponsored conferences in 2021, the IEEE Application-specific Systems Architecture and Processors (ASAP) conference. One-page teasers of three best papers awarded at the 2021 ASAP conference are showcased: “Algorithm and Hardware Co-Design for FPGA Acceleration of Hamiltonian Monte Carlo Based No-U-Turn Sampler”; “To Buffer, or Not to Buffer? A Case Study on FFT Accelerators for Ultra-Low-Power Multicore Clusters”; “Improving Inference Lifetime of Neuromorphic Systems via Intelligent Synapse Mapping.”

In a continuation of our Women in VLSI (WiV) series, we share an inspiring interview with Prof. Srabanti Chowdhury, Associate Professor in the Department of Electrical Engineering at Stanford University, CA, USA. Additionally, included is a section on relevant recent announcements collated by our Associate Editor, Ishan Thakkar. I’d love to hear from the readers on what you would like to see in the subsequent newsletters. Feel free to provide any feedback/recommendations via email to me. Happy reading.

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